SMJ44C256 Datasheet, PDF (10/21 Pages) Texas Instruments – 262144 BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORY

SMJ44C256
262144 BY 4-BIT
DYNAMIC RANDOM-ACCESS MEMORY
SGMS034C – MAY 1989 – REVISED JUNE 1995
PARAMETER MEASUREMENT INFORMATION
RAS
tw(RL)
tcc((rrdd))
CAS
td(RLCL)
td(RLCH)
tt
td(CLRH)
tw(CL)
tw(RH)
td(CHRL)
td(RLCA)
th(RA)
tsu(RA)
th(RLCA)
tsu(CA)
td(CACH)
td(CARH)
A0 – A8
Row
Column
tw(CH)
Don’t Care
tsu(rd)
th(CA)
th(RHrd)
th(CHrd)
W
DQ1 – DQ4
Don’t Care
Hi-Z
ta(C)
ta(CA)
See Note A
tdis(CH)
Valid
Don’t Care
ta(RL)
ta(G)
td(GLRH)
G
Don’t Care
NOTE B: Output can go from the high-impedance state to an invalid-data state prior to the specified access time.
Figure 2. Read-Cycle Timing
tdis(G)
Don’t Care
10
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