THS7327 Datasheet, PDF (12/26 Pages) Texas Instruments – 3-Channel RGBHV Video Buffer with I2C Control, Selectable Filters, Monitor Pass-Thru,2:1 Input MUX, and Selectable Input Bias Modes

THS7327
SLOS502 – SEPTEMBER 2006
SDA
TERMINAL
NAME
NO.
HTQFP-48
19
SCL
20
PUC
21
MUX MODE
15
MUX Select
16
CH. 1 –Buffer Output
35, 36
CH. 2 –Buffer Output
31, 32
CH. 3 –Buffer Output
Horizontal Sync Output
Vertical Sync Output
CH. 1 - SAG
27, 28
25
24
45
CH. 1 – OUTPUT
46
CH. 2 - SAG
43
CH. 2 – OUTPUT
44
CH. 3 - SAG
41
CH. 3 – OUTPUT
42
Horizontal Sync
Monitor Output
Vertical Sync Monitor
Output
AGND
+VA
VDD
DGND
40
39
6, 12, 13,
26, 30, 34,
37
29, 33, 38,
37
23
22
Schmitt Trigger Adjust
14
TERMINAL FUNCTIONS (continued)
www.ti.com
I/O
DESCRIPTION
I/O
Serial data line of the I2C bus. Pull-up resistor should have a minimum value = 2-kΩ and a
maximum value = 19-kΩ. Pull up to Vs+
I
I²C bus Clock Line. Pull-up resistor should have a minimum value = 2-kΩ and a maximum
value = 19-kΩ. Pull up to Vs+
Power-Up Condition – Connect to GND for all channels disabled upon power-up. Connect to
I VDD (Logic High) to set Buffer Outputs to OFF and Monitor Outputs ON with AC-Bias
configuration on Channels 1 to 3 and HV syncs are enabled.
I
Sets the MUX configuration control – Connect to GND for MUX Select Pin Control. Connect
to Logic High for I2C control of the MUX.
I
Controls the MUX selection when MODE Pin is set to Logic High. Connect to GND for MUX
selector set to Input A. Connect to Logic High for MUX selector set to Input B.
O
Output Channel 1 from Either CH. 1 – INPUT A or CH. 1 – INPUT B – Connect to ADC /
Scalar / Decoder
O
Output Channel 1 from Either CH. 2 – INPUT A or CH. 2 – INPUT B – Connect to ADC /
Scalar / Decoder
O
Output Channel 3 from Either CH. 3 – INPUT A or CH. 3 – INPUT B – Connect to ADC /
Scalar / Decoder
O Horizontal Sync Output – Connect to ADC / Scalar H-sync Input
O Vertical Sync Output – Connect to ADC / Scalar V-sync Input
O
Video Monitor Pass-Thru Output Channel 1 SAG Correction Pin. If SAG is not used, Connect
Directly to CH. 1 – OUTPUT Pin 46.
O
Video Monitor Pass-Thru Output Channel 1 From Either CH. 1 – INPUT A or CH. 1 – INPUT
B
O
Video Monitor Pass-Thru Output Channel 2 SAG Correction Pin. If SAG is not Used,
Connect Directly to CH. 2 – OUTPUT Pin 44.
O
Video Monitor Pass-Thru Output Channel 2 From Either CH. 2 – INPUT A or CH. 2 – INPUT
B
O
Video Monitor Pass-Thru Output Channel 3 SAG Correction Pin. If SAG is not Used,
Connect Directly to CH. 3 – OUTPUT Pin 42.
O
Video Monitor Pass-Thru Output Channel 3 From Either CH. 3 – INPUT A or CH. 3 – INPUT
B
O Horizontal Sync Monitor Pass-Thru Output
O Vertical Sync Monitor Pass-Thru Output
Ground Reference Pin for Analog Signals. Internally these pins connect to DGND. Although
I it is recommended to have the AGND and DGND connected to the proper signals for best
results.
I Analog Positive Power Supply Input Pins – connect to 2.7 V to 5 V. Must be equal to or
greater than VDD.
I Digital Positive Supply Pin for I²C circuitry and HV Sync Outputs – Connect to 2.7 V to 5 V.
I Digital GND pin for HV Circuitry and I2C circuitry.
I
Defaults to 1.45V (TTL compatible). Connect to external voltage reference to adjust HV sync
input thresholds from 0.9-V to 2-V range.
12
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