THS7327 Datasheet, PDF (11/26 Pages) Texas Instruments – 3-Channel RGBHV Video Buffer with I2C Control, Selectable Filters, Monitor Pass-Thru,2:1 Input MUX, and Selectable Input Bias Modes

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PIN CONFIGURATION
THS7327PHP
HTQFP-48 (PHP)
(Top View)
THS7327
SLOS502 – SEPTEMBER 2006
CH. 1 - INPUT A
CH. 2 - INPUT A
CH. 3 - INPUT A
H-SYNC - INPUT A
V-SYNC - INPUT A
AGND
CH. 1 - INPUT B
CH. 2 - INPUT B
CH. 3 - INPUT B
H-Sync - INPUT B
V-Sync - INPUT B
AGND
48 47 46 45 44 43 42 41 40 39 38 37
1
36
2
35
3
34
4
33
5
32
6
THS7327
31
7
30
8
29
9
28
10
27
11
26
12
25
13 14 15 16 17 18 19 20 21 22 23 24
CH. 1 - BUFFER OUTPUT
CH. 1 - BUFFER OUTPUT
AGND
+VA
CH. 2 - BUFFER OUTPUT
CH. 2 - BUFFER OUTPUT
AGND
+VA
CH. 3 - BUFFER OUTPUT
CH. 3 - BUFFER OUTPUT
AGND
H-SYNC BUFFER OUTPUT
TERMINAL
NAME
NO.
HTQFP-48
CH. 1 – INPUT A
1
CH. 2 – INPUT A
2
CH. 3 – INPUT A
3
H-Sync – INPUT A
4
V-Sync – INPUT A
5
CH. 1 – INPUT B
7
CH. 2 – INPUT B
8
CH. 3 – INPUT B
9
H-Sync – INPUT B
10
V-Sync – INPUT B
11
I²C-A1
17
I²C-A0
18
TERMINAL FUNCTIONS
I/O
DESCRIPTION
I Video Input Channel 1 – Input A
I Video Input Channel 2 – Input A
I Video Input Channel 3 – Input A
I Horizontal Sync – Input A
I Vertical Sync – Input A
I Video Input Channel 1 – Input B
I Video Input Channel 2 – Input B
I Video Input Channel 3 – Input B
I Horizontal Sync – Input B
I Vertical Sync – Input B
I
I²C Slave Address Control Bit A1 – Connect to Vs+ for a Logic 1 preset value or GND for a
Logic 0 preset value.
I
I²C Slave Address Control Bit A0 – Connect to Vs+ for a Logic 1 preset value or GND for a
Logic 0 preset value.
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