THS7327 Datasheet, PDF (10/26 Pages) Texas Instruments – 3-Channel RGBHV Video Buffer with I2C Control, Selectable Filters, Monitor Pass-Thru,2:1 Input MUX, and Selectable Input Bias Modes

THS7327
SLOS502 – SEPTEMBER 2006
FUNCTIONAL DIAGRAM
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Channel 1
Input A
Channel 2
Input A
Channel 3
Input A
H-Sync
Input A
V-Sync
Input A
Channel 1
Input B
Channel 2
Input B
Channel 3
Input B
H-Sync
Input B
V-Sync
Input B
Bypass
2:1
X1
DC
+Offset
DC
AC-
BIAS
AC
Sync
TIP
Clamp
+
LPF
9/16/35/
-
75MHz
+
Disable
-
= OPEN
Bypass
1 kW
878 W
Channel 1 Buffer
Output (To ADC)
675 W
150 W
Channel 1 Monitor
Output
Channel 1 SAG
2:1
X1
DC
+Offset
DC
AC-
BIAS
AC
Sync
TIP
Clamp
LPF
+
9/16/35/
-
75MHz
+
Disable
= OPEN
-
1 kW
Bypass
878 W
Channel 2 Buffer
Output (To ADC)
675 W
150 W
Channel 2 Monitor
Output
Channel 2 SAG
2:1
X1
DC
+Offset
DC
AC-
BIAS
AC
Sync
TIP
Clamp
2:1
+
-
+
LPF
9/16/35/
-
75MHz
+
Disable
-
= OPEN
1 kW 878 W
Channel 3 Buffer
Output (To ADC)
675 W
150 W
Channel 3 Monitor
Output
Channel 3 SAG
Horizontal Sync
Buffer OUTPUT
Horizontal Sync
Monitor OUTPUT
2:1
+
-
10 kW
+1.4 V
Vertical Sync
Buffer OUTPUT
Vertical Sync
Monitor OUTPUT
MUX
MUX SCHMITT SDA SCL I2C- I2C- PUC
MODE SELECT TRIGGER
A1 A0
ADJUST
NOTE: The I²C Address of the THS7327 is 01011(A1)(A0)(R/W)
+V_{DD DGND} +V_A
AGND
10
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