TL16CP754C Datasheet, PDF (1/49 Pages) Texas Instruments – QUAD UARTS WITH 64-BYTE FIFO

TL16CP754C, TL16CM754C, TL16C754C
www.ti.com
SLLS644E – DECEMBER 2007 – REVISED MAY 2010
QUAD UARTS WITH 64-BYTE FIFO
Check for Samples: TL16CP754C, TL16CM754C, TL16C754C
FEATURES
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• ST16C654/654D Pin Compatible With
Additional Enhancements
• Support up to 24-MHz Crystal Input Clock
(1.5 Mbps)
• Support up to 48-MHz Oscillator Input Clock
(3 Mbps) for 5-V Operation
• Support up to 32-MHz Oscillator Input Clock
(2 Mbps) for 3.3-V Operation
• Support up to 24-MHz Input Clock (1.5 Mbps)
for 2.5-V Operation
• Support up to 16-MHz Input Clock (1 Mbps) for
1.8-V Operation
• 64-Byte Transmit FIFO
• 64-Byte Receive FIFO With Error Flags
• Programmable and Selectable Transmit and
Receive FIFO Trigger Levels for DMA and
Interrupt Generation
• Programmable Receive FIFO Trigger Levels for
Software/Hardware Flow Control
• Software/Hardware Flow Control
– Programmable Xon/Xoff Characters
– Programmable Auto-RTS and Auto-CTS
• Optional Data Flow Resume by Xon Any
Character
• DMA Signaling Capability for Both Received
and Transmitted Data on PN Package
• RS-485 Mode Support
• Support 1.8-V, 2.5-V, 3.3-V, or 5-V Supply
• Characterized for Operation From –40°C to
85°C, Available in Commercial and Industrial
Temperature Grades
• Software-Selectable Baud-Rate Generator
• Prescalable Provides Additional Divide-by-4
Function
• Programmable Sleep Mode
• Programmable Serial Interface Characteristics
– 5-, 6-, 7-, or 8-Bit Characters
– Even, Odd, or No Parity Bit Generation and
Detection
– 1-, 1.5-, or 2-Stop Bit Generation
• False Start Bit Detection
• Complete Status Reporting Capabilities in
Both Normal and Sleep Mode
• Line Break Generation and Detection
• Internal Test and Loopback Capabilities
• Fully Prioritized Interrupt System Controls
• Modem Control Functions (CTS, RTS, DSR,
DTR, RI, and CD)
• IrDA Capability
DESCRIPTION
The '754C is a quad universal asynchronous receiver/transmitter (UART) with 64-byte FIFOs, automatic
hardware/software flow control, and data rates up to 3 Mbps. It incorporates the functionality of four UARTs, each
UART having its own register set and FIFOs. The four UARTs share only the data bus interface and clock
source, otherwise they operate independently. Another name for the UART function is Asynchronous
Communications Element (ACE), and these terms are used interchangeably. The bulk of this document
describes the behavior of each ACE, with the understanding that four such devices are incorporated into the
'754C. The '754C offers enhanced features. It has a transmission control register (TCR) that stores received
FIFO threshold level to start/stop transmission during hardware and software flow control. With the FIFO RDY
register, the software gets the status of TXRDY/RXRDY for all four ports in one access. On-chip status registers
provide the user with error indications, operational status, and modem interface control. System interrupts may
be tailored to meet user requirements. An internal loopback capability allows onboard diagnostics.
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Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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