SM59R16A5 Datasheet, PDF (59/89 Pages) SyncMOS Technologies,Inc – Two serial peripheral interfaces in full duplex mode

SM59R16A5/SM59R09A5/SM59R05A5
8-Bit Micro-controller
64KB/36KB/20KB with ISP Flash
& 2KB RAM embedded
Mnemonic: PWMD3H
Address: B3h
7
6
5
4
3
2
1
0 Reset
PWMP3 -
-
-
-
-
PWMD3[9:8] 00H
Mnemonic: PWMD3L
7
6
5
4
3
2
PWMD3[7:0]
Address: B4h
1
0 Reset
00H
PWMP3: PWM channel 3 idle polarity select.
“0” – PWM channel 3 will idle low.
“1” – PWM channel 3 will idle high.
PWMD3[9:0]: PWM channel 3 data register.
Mnemonic: PWMMDH
Address: CEh
7
6
5
4
3
2
1
0 Reset
-
-
-
-
-
-
PWMMD[9:8] 00H
Mnemonic: PWMMDL
7
6
5
4
3
2
PWMMD[7:0]
Address: CFh
1
0 Reset
FFH
PWMMD[9:0]: PWM Max Data register.
PWM count from 0000h to PWMMD[9:0]. When PWM count data equal PWMMD[9:0]
is overflow.
PWMPx = 0 & PWMDx = 00h
PWMx
Low
PWMPx = 0 & PWMDx ≠ 00h
PWMx
PWMPx = 1 & PWMDx = 00h
High
PWMx
PWMPx = 1 & PWMDx ≠ 00h
PWMx
PWM period = ^{PWMMD + 1}
PWM clock
Leader pulse = ^PWMDx
PWM clock
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M047
59
Ver.H SM59R16A5 04/2015