SM59R16A5 Datasheet, PDF (58/89 Pages) SyncMOS Technologies,Inc – Two serial peripheral interfaces in full duplex mode

SM59R16A5/SM59R09A5/SM59R05A5
8-Bit Micro-controller
64KB/36KB/20KB with ISP Flash
& 2KB RAM embedded
PWM3EN = 0 – PWM channel 3 disable.
PWM2EN: PWM channel 2 enable control bit.
PWM2EN = 1 – PWM channel 2 enable.
PWM2EN = 0 – PWM channel 2 disable.
PWM1EN: PWM channel 1 enable control bit.
PWM1EN = 1 – PWM channel 1 enable.
PWM1EN = 0 – PWM channel 1 disable.
PWM0EN: PWM 0 enable control bit.
PWM0EN = 1 – PWM channel 0 enable.
PWM0EN = 0 – PWM channel 0 disable.
Mnemonic: PWMD0H
Address: BCh
7
6
5
4
3
2
1
0 Reset
PWMP0 -
-
-
-
-
PWMD0[9:8] 00H
Mnemonic: PWMD0L
7
6
5
4
3
2
PWMD0[7:0]
Address: BDh
1
0 Reset
00h
PWMP0: PWM channel 0 idle polarity select.
“0” – PWM channel 0 will idle low.
“1” – PWM channel 0 will idle high.
PWMD0[9:0]: PWM channel 0 data register.
Mnemonic: PWMD1H
Address: BEh
7
6
5
4
3
2
1
0 Reset
PWMP1 -
-
-
-
-
PWMD1[9:8] 00H
Mnemonic: PWMD1L
7
6
5
4
3
2
PWMD1[7:0]
Address: BFh
1
0 Reset
00H
PWMP1: PWM channel 1 idle polarity select.
“0” – PWM channel 1 will idle low.
“1” – PWM channel 1 will idle high.
PWMD1[9:0]: PWM channel 1 data register.
Mnemonic: PWMD2H
Address: B1h
7
6
5
4
3
2
1
0 Reset
PWMP2 -
-
-
-
-
PWMD2[9:8] 00H
Mnemonic: PWMD2L
7
6
5
4
3
2
PWMD2[7:0]
Address: B2h
1
0 Reset
00H
PWMP2: PWM channel 2 idle polarity select.
“0” – PWM channel 2 will idle low.
“1” – PWM channel 2 will idle high.
PWMD2[9:0]: PWM channel 2 data register.
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M047
58
Ver.H SM59R16A5 04/2015