SMD1108 Datasheet, PDF (23/29 Pages) Summit Microelectronics, Inc. – 8-Channel Auto-Monitor ADC In System Programmable Analog (ISPA) Device

SMD1108
Preliminary
Registers 9A and 9B are the status registers. These
registers are read-only and are volatile. The Status
Register is cleared by forcing the IRQ_RST# input low.
7
OV3
CH7
0
1
6
OV2
CH6
0
1
5
4
3
2
1
0 Bit
OV1 OV0 UV3 UV2 UV1 UV0
CH5 CH4 CH7 CH6 CH5 CH4
Function
0
0
0
0
0
0 Condition not the cause of an IRQ
1
1
1
1
1
1 Condition the cause of an IRQ
2052 Table30 1.0
Table 30. GFS Register 9A Status Register (Read Only)
7
OC3
CH7
0
1
6
OC2
CH6
0
1
5
4
3
2
1
0 Bit
OC1
CH5
OC0
CH4
LIM3
CH3
LIM2
CH2
LIM1 LIM0
CH1 CH0
Function
0
0
0
0
0
0 Condition not the cause of an IRQ
1
1
1
1
1
1 Condition the cause of an IRQ
2052 Table31 1.0
Table 31. GFS Register 9B Status Register (Read Only)
Registers 9E and 9F are the Fault registers. These
registers are nonvolatile and can only be cleared by writing
to the affected bit. This register is cleared by writing a 0 to
the affected bit location.
7
OV3
CH7
0
1
6
OV2
CH6
0
1
5
OV1
CH5
0
1
4
3
2
1
0 Bit
OV0 UV3 UV2 UV1 UV0
CH4 CH7 CH6 CH5 CH4
Function
0
0
0
0
0 Condition not the cause of an IRQ
1
1
1
1
1 Condition the cause of an IRQ
2052 Table32 1.0
Table 32. GFS Register 9E NV Fault Latch
7
OC3
CH7
0
1
6
OC2
CH6
0
1
5
OC1
CH5
0
1
SUMMIT MICROELECTRONICS, Inc.
4
3
2
1
0 Bit
OC0
CH4
LIM3
CH3
LIM2
CH2
LIM1 LIM0
CH1 CH0
Function
0
0
0
0
0 Condition not the cause of an IRQ
1
1
1
1
1 Condition the cause of an IRQ
2052 Table33 1.0
Table 33. GFS Register 9F NV Fault Latch
2052 2.0 10/05/01
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