CD00001237 Datasheet, PDF (43/105 Pages) STMicroelectronics – 8-bit MCUs with A/D converter

ST6215C ST6225C
9 ON-CHIP PERIPHERALS
9.1 WATCHDOG TIMER (WDG)
9.1.1 Introduction
The Watchdog timer is used to detect the occur-
rence of a software fault, usually generated by ex-
ternal interference or by unforeseen logical condi-
tions, which causes the application program to
abandon its normal sequence. The Watchdog cir-
cuit generates an MCU reset on expiry of a pro-
grammed time period, unless the program refresh-
es the counter’s contents before the SR bit be-
comes cleared.
Figure 25. Watchdog Block Diagram
9.1.2 Main Features
■ Programmable timer (64 steps of 3072 clock
cycles)
■ Software reset
■ Reset (if watchdog activated) when the SR bit
reaches zero
■ Hardware or software watchdog activation
selectable by option bit (Refer to the option
bytes section)
RESET
WATCHDOG REGISTER (WDGR)
T0 T1 T2 _T3 T4 T5 SR
C
bit 7
7-BIT DOWNCOUNTER
bit 0
f_{int /12}
CLOCK DIVIDER
÷ 256
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