CD00001237 Datasheet, PDF (28/105 Pages) STMicroelectronics – 8-bit MCUs with A/D converter

ST6215C ST6225C
Figure 17. Interrupts Block Diagram
VDD
NMI
LATCH
CLEARED BY H/W
AT START OF VECTOR #0 ROUTINE
PA0..PA7
I/O PORT REGISTER
“INPUT WITH INTERRUPT”
CONFIGURATION
LATCH
0
CLEARED BY H/W
AT START OF
VECTOR #1 ROUTINE
1
LES BIT
(IOR REGISTER)
VECTOR #0
VECTOR #1
EXIT FROM
STOP/WAIT
PB0..PB7
PC4..PC7
I/O PORT REGISTER
“INPUT WITH INTERRUPT”
CONFIGURATION
LATCH
ESB BIT
(IOR REGISTER) ^CLEARED
BY H/W AT START OF
VECTOR #2 ROUTINE
TMZ BIT
TIMER _{ETI BIT}
(TSCR REGISTER)
A/D CONVERTER
EAI BIT
EOC BIT
(ADCR REGISTER)
GEN BIT
(IOR REGISTER)
VECTOR #2
VECTOR #3
VECTOR #4
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