LSM330DL Datasheet, PDF (41/54 Pages) STMicroelectronics – Linear sensor module 3D accelerometer sensor and 3D gyroscope sensor

LSM330DL
Registers description
Table 70. High-pass filter cutoff frequency configuration [Hz] (continued)
HPCF3-0
ODR = 100 Hz
ODR = 200 Hz
ODR = 400 Hz
ODR = 800 Hz
0110
0.1
0.2
0.5
1
0111
0.05
0.1
0.2
0.5
1000
0.02
0.05
0.1
0.2
1001
0.01
0.02
0.05
0.1
7.26
CTRL_REG3_G (22h)
Table 71.
I1_Int1
CTRL_REG3_G register
I1_Boot H_Lactive PP_OD
I2_DRDY
I2_WTM
I2_ORun I2_Empty
Table 72.
I1_Int1
I1_Boot
H_Lactive
PP_OD
I2_DRDY
I2_WTM
I2_ORun
I2_Empty
CTRL_REG3_G description
Interrupt enable on INT1_G pin. Default value 0. (0: Disable; 1: Enable)
Boot status available on INT1_G. Default value 0. (0: Disable; 1: Enable)
Interrupt active configuration on INT1_G. Default value 0. (0: High; 1:Low)
Push-Pull / Open drain. Default value: 0. (0: Push-Pull; 1: Open drain)
Date Ready on DRDY_G/INT2_G. Default value 0. (0: Disable; 1: Enable)
FIFO watermark interrupt on DRDY_G/INT2_G. Default value: 0. (0: Disable; 1: Enable)
FIFO overrun interrupt on DRDY_G/INT2_G Default value: 0. (0: Disable; 1: Enable)
FIFO empty interrupt on DRDY_G/INT2_G. Default value: 0. (0: Disable; 1: Enable)
7.27 CTRL_REG4_G (23h)
Table 73. CTRL_REG4_G register
BDU
BLE
FS1
FS0
1. This bit has to be set to ‘0’ for correct operation.
--
0⁽¹⁾
0⁽¹⁾
SIM
Table 74.
BDU
BLE
CTRL_REG4_G description
Block data update. Default value: 0
(0: continuous update; 1: output registers not updated until MSB and LSB
have been read)
Big/little endian data selection. Default value 0.
(0: Data LSB at lower address; 1: Data MSB at lower address)
Doc ID 022018 Rev 1
41/54