English
Language : 

MB84VD23481FJ-70 Datasheet, PDF (35/55 Pages) SPANSION – 64 M (×16) FLASH MEMORY & 32 M (×16) Mobile FCRAM
MB84VD23481FJ-70
2. AC Characteristics
• READ OPERATION (FCRAM)
Parameter
Read Cycle Time
Chip Enable Access Time
Output Enable Access Time
Address Access Time
Output Data Hold Time
CE1r Low to Output Low-Z
OE Low to Output Low-Z
CE1r High to Output High-Z
OE High to Output High-Z
Address Setup Time to CE1r Low
Address Setup Time to OE
LB / UB Setup Time to CE1r Low
LB / UB Setup Time to OE Low
Address Invalid Time
Address Hold Time from CE1r Low
Address Hold Time from OE Low
Address Hold Time from CE1r High
Address Hold Time from OE High
LB / UB Hold Time from CE1r High
LB / UB Hold Time from OE High
CE1r Low to OE Low Delay Time
OE Low to CE1r High Delay Time
CE1r High Pulse Width
OE High Pulse Width
Symbol
tRC
tCE
tOE
tAA
tOH
tCLZ
tOLZ
tCHZ
tOHZ
tASC
tASO
tASO(ABS)
tBSC
tBSO
tAX
tCLAH
tOLAH
tCHAH
tOHAH
tCHBH
tOHBH
tCLOL
tOLCH
tCP
tOP
tOP(ABS)
Value
Min
Max
70
—
—
65
—
40
—
65
5
—
5
—
0
—
—
20
—
20
–5
—
25
—
10
—
–5
—
10
—
—
5
70
—
45
—
–5
—
–5
—
–5
—
–5
—
25
1000
45
—
12
—
25
1000
12
—
Unit
Notes
ns
ns
*1,*3
ns
*1
ns
*1,*4
ns
*1
ns
*2
ns
*2
ns
*2
ns
*2
ns
*5
ns
*3,*6
ns
*7
*5
ns
*4,*8
ns
*4
ns
*4,*9
ns
ns
ns *3,*6,*9,*10
ns
*9
ns
ns
*6,*9,*10
ns
*7
*1 : The output load is 30 pF.
*2 : The output load is 5 pF.
*3 : The tCE is applicable if OE is brought to Low before CE1r goes Low and is also applicable if actual value of both
or either tASO or tCLOL is shorter than specified value.
*4 : Applicable only to A0 and A1 when both CE1r and OE are kept at Low for the address access.
*5 : Applicable if OE is brought to Low before CE1r goes Low.
*6 : The tASO, tCLOL(Min) and tOP(Min) are reference values when the access time is determined by tOE.
If actual value of each parameter is shorter than specified minimum value, tOE become longer by the amount of
subtracting actual value from specified minimum value.
For example, if actual tASO, tASO(actual), is shorter than specified minimum value, tASO(Min), during OE control
access (ie., CE1r stays Low), the tOE become tOE(Max) + tASO(Min) – tASO(actual).
*7 : The tASO(ABS) and tOP(ABS) is the absolute minimum value during OE control access.
*8 : The tAX is applicable when both A0 and A1 are switched from previous state.
*9 : If actual value of either tCLOL or tOP is shorter than specified minimum value, both tOLAH and tOLCH become tRC(Min) –
tCLOL(actual) or tRC(Min) – tOP(actual).
*10 : Maximum value is applicable if CE1r is kept at Low.
35