SIO10N268 Datasheet, PDF (5/251 Pages) SMSC Corporation – Advenced Notebook I/O for ISA or LPC Designs with X-Bus Interface for I/O, Memory, and FWH Emulation and Four Srial Ports

Advanced Notebook I/O for ISA or LPC Designs
Datasheet
8.7.8.11 Lock.................................................................................................................................................90
8.7.8.12 Enhanced DUMPREG .....................................................................................................................91
8.7.8.13 Compatibility ....................................................................................................................................91
8.8 Serial Port (UART) ............................................................................................................................ 91
8.8.1 Register Description ...............................................................................................................................91
8.8.1.1 Receive Buffer Register (RB) ..........................................................................................................92
8.8.1.2 Transmit Buffer Register (TB)..........................................................................................................92
8.8.1.3 Interrupt Enable Register (IER) .......................................................................................................92
8.8.1.4 FIFO Control Register (FCR)...........................................................................................................93
8.8.1.5 Interrupt Identification Register (IIR) ................................................................................................94
8.8.1.6 Line Control Register (LCR) ............................................................................................................95
8.8.1.7 Modem Control Register (MCR) ......................................................................................................97
8.8.1.8 Line Status Register (LSR) ..............................................................................................................98
8.8.1.9 Modem Status Register (MSR)........................................................................................................99
8.8.1.10 Scratchpad Register (SCR) ...........................................................................................................100
8.8.2 Programmable Baud Rate Generator (AND Divisor Latches DLH, DLL) ..............................................100
8.8.3 Effect Of The Reset on Register File ....................................................................................................100
8.8.4 FIFO Interrupt Mode Operation.............................................................................................................100
8.8.5 FIFO Polled Mode Operation ................................................................................................................101
8.8.6 Notes On Serial Port Operation ............................................................................................................108
8.8.6.1 FIFO Mode Operation....................................................................................................................108
8.8.6.2 TX and RX FIFO Operation ...........................................................................................................108
8.9 Infrared Interface ............................................................................................................................. 108
8.9.1 IrDA SIR/FIR and ASKIR ......................................................................................................................109
8.9.2 Consumer IR.........................................................................................................................................109
8.9.3 Hardware Interface ...............................................................................................................................109
8.9.4 IR Half Duplex Turnaround Delay Time ................................................................................................110
8.9.5 IR Transmit Pins ...................................................................................................................................111
8.10 Parallel Port.................................................................................................................................. 111
8.10.1 IBM XT/AT Compatible, Bi-Directional And EPP Modes ...................................................................113
8.10.1.1 Data Port .......................................................................................................................................113
8.10.1.2 Status Port.....................................................................................................................................113
8.10.1.3 Control Port ...................................................................................................................................114
8.10.1.4 EPP Address Port..........................................................................................................................115
8.10.1.5 EPP Data Port 0 ............................................................................................................................115
8.10.1.6 EPP Data Port 1 ............................................................................................................................115
8.10.1.7 EPP Data Port 2 ............................................................................................................................115
8.10.1.8 EPP Data Port 3 ............................................................................................................................115
8.10.2 EPP 1.9 Operation ............................................................................................................................116
8.10.2.1 Software Constraints .....................................................................................................................116
8.10.2.2 EPP 1.9 Write ................................................................................................................................116
8.10.2.3 EPP 1.9 Read................................................................................................................................117
8.10.3 EPP 1.7 Operation ............................................................................................................................117
8.10.3.1 Software Constraints .....................................................................................................................118
8.10.3.2 EPP 1.7 Write ................................................................................................................................118
8.10.3.3 EPP 1.7 Read................................................................................................................................118
8.10.4 Extended Capabilities Parallel Port ...................................................................................................119
8.10.5 Vocabulary ........................................................................................................................................120
8.10.6 ECP Implementation Standard..........................................................................................................121
8.10.6.1 Description.....................................................................................................................................121
8.10.6.2 Register Definitions .......................................................................................................................122
8.10.7 Operation ..........................................................................................................................................128
8.10.7.1 Mode Switching/Software Control..................................................................................................128
8.10.7.2 ECP Operation ..............................................................................................................................128
8.10.7.3 Termination from ECP Mode .........................................................................................................129
8.10.7.4 Command/Data .............................................................................................................................129
8.10.7.5 Data Compression .........................................................................................................................129
8.10.7.6 Pin Definition .................................................................................................................................130
8.10.7.7 LPC Connections...........................................................................................................................130
8.10.7.8 Interrupts .......................................................................................................................................130
SMSC SIO10N268
Page 5
DATASHEET
Rev. 0.5 (03-24-05)