SIO10N268 Datasheet, PDF (102/251 Pages) SMSC Corporation – Advenced Notebook I/O for ISA or LPC Designs with X-Bus Interface for I/O, Memory, and FWH Emulation and Four Srial Ports

Advanced Notebook I/O for ISA or LPC Designs
Datasheet
There is no trigger level reached or timeout condition indicated in the FIFO Polled Mode, however, the
RCVR and XMIT FIFOs are still fully capable of holding characters.
Table 8.35 - Baud Rates
DESIRED
BAUD RATE
50
75
110
134.5
150
300
600
1200
1800
2000
2400
3600
4800
7200
9600
19200
38400
57600
115200
230400
460800
DIVISOR USED TO
GENERATE 16X CLOCK
2304
1536
1047
857
768
384
192
96
64
58
48
32
24
16
12
6
3
2
1
32770
32769
PERCENT ERROR DIFFERENCE
BETWEEN DESIRED AND ACTUAL
(Note 8.15)
0.001
-
-
0.004
-
-
-
-
-
0.005
-
-
-
-
-
-
0.030
0.16
0.16
0.16
0.16
HIGH
SPEED BIT
(Note 8.16)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
Note 8.15 The percentage error for all baud rates, except where indicated otherwise, is 0.2%.
Note 8.16 The High Speed bit is located in the Device Configuration Space.
Table 8.36 - Reset Function Table
REGISTER/SIGNAL
Interrupt Enable Register
Interrupt Identification Reg.
FIFO Control
Line Control Reg.
MODEM Control Reg.
Line Status Reg.
MODEM Status Reg.
TXD1, TXD2
INTRPT (RCVR errs)
INTRPT (RCVR Data Ready)
INTRPT (THRE)
OUT2B
RTSB
DTRB
RESET CONTROL
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET/Read LSR
RESET/Read RBR
RESET/ReadIIR/Write THR
RESET
RESET
RESET
RESET STATE
All bits low
Bit 0 is high; Bits 1 - 7 low
All bits low
All bits low
All bits low
All bits low except 5, 6 high
Bits 0 - 3 low; Bits 4 - 7 input
High
Low
Low
Low
High
High
High
Rev. 0.5 (03-24-05)
Page 102
DATASHEET
SMSC SIO10N268