SIO10N268 Datasheet, PDF (104/251 Pages) SMSC Corporation – Advenced Notebook I/O for ISA or LPC Designs with X-Bus Interface for I/O, Memory, and FWH Emulation and Four Srial Ports

Advanced Notebook I/O for ISA or LPC Designs
Datasheet
REGISTER
ADDRESS
(Note 8.17)
ADDR = 0
DLAB = 0
ADDR = 0
DLAB = 0
ADDR = 1
DLAB = 0
ADDR = 2
ADDR = 2
ADDR = 3
Table 8.37 - Register Summary for an Individual UART Channel
REGISTER NAME
Receive Buffer Register
(Read Only)
Transmitter Holding
Register (Write Only)
Interrupt Enable Register
Interrupt Ident. Register
(Read Only)
FIFO Control Register
(Write Only)
Line Control Register
REGISTER
SYMBOL
RBR
THR
IER
IIR
FCR
(Note 8.24)
LCR
BIT 0
BIT 1
BIT 2
BIT 3 BIT 4
BIT 5
BIT 6
BIT 7
Data Bit 0 Data Bit 1
(Note 8.18)
Data Bit 0 Data Bit 1
Enable
Received
Data
Available
Interrupt
(ERDAI)
"0" if
Interrupt
Pending
Enable
Transmitter
Holding
Register
Empty
Interrupt
(ETHREI)
Interrupt ID
Bit
FIFO
Enable
RCVR
FIFO Reset
Word
Length
Select Bit 0
(WLS0)
Word
Length
Select Bit 1
(WLS1)
Data Bit 2 Data Bit
3
Data Bit 2 Data Bit
3
Enable
Receiver
Line
Status
Interrupt
(ELSI)
Enable
MODEM
Status
Interrupt
(EMSI)
Interrupt
ID Bit
Interrupt
ID Bit
(Note
8.22)
XMIT
FIFO
Reset
DMA
Mode
Select
(Note
8.23)
Number Parity
of Stop Enable
Bits (STB) (PEN)
Data Bit
4
Data Bit
4
0
0
Reserve
d
Even
Parity
Select
(EPS)
Data Bit 5 Data Bit 6
Data Bit 5 Data Bit 6
0
0
0
FIFOs
Enabled
(Note 8.22)
Reserved RCVR
Trigger LSB
Stick Parity Set Break
Data Bit 7
Data Bit 7
0
FIFOs
Enabled
(Note 8.22)
RCVR
Trigger
MSB
Divisor
Latch
Access Bit
(DLAB)
ADDR = 4
ADDR = 5
ADDR = 6
MODEM Control Register
Line Status Register
MODEM Status Register
Rev. 0.5 (03-24-05)
MCR
LSR
MSR
Data
Terminal
Ready
(DTR)
Data
Ready
(DR)
Request to OUT1
Send (RTS) _(Note
8.20)
OUT2
(Note
8.20)
Overrun
Error (OE)
Parity
Framing
Error (PE) Error
(FE)
Delta Clear Delta Data
to Send Set Ready
(DCTS) (DDSR)
Trailing
Edge
Ring
Indicator
(TERI)
Delta
Data
Carrier
Detect
(DDCD)
Loop 0
0
Break
Interrupt
(BI)
Clear to
Send
(CTS)
Transmitter
Holding
Register
(THRE)
Transmitter
Empty
(TEMT)
(Note 8.19)
Data Set
Ready
(DSR)
Ring
Indicator
(RI)
0
Error in
RCVR
FIFO (Note
8.22)
Data
Carrier
Detect
(DCD)
Page 106
SMSC SIO10N268
DATASHEET