SIO10N268 Datasheet, PDF (214/251 Pages) SMSC Corporation – Advenced Notebook I/O for ISA or LPC Designs with X-Bus Interface for I/O, Memory, and FWH Emulation and Four Srial Ports

Advanced Notebook I/O for ISA or LPC Designs
Datasheet
LOGICAL
DEVICE
Runtime
Register Block
Config. Port
Serial Port 3
Serial Port 4
X-Bus
REGISTER
INDEX
0x30
0x12, 0x13
(Note 2)
0x1B
0x1C
0x4E, 0x4F
0x50, 0x51
BASE I/O
RANGE
(Note 10.37)
[0x0100:0x0FE0]
on 32-byte boundaries
[0x0100:0x07FE]
On 2-byte boundaries
[0x0100:0x03F8]
on 8 byte boundaries
[0x0100:0x03F8]
on 8 byte boundaries
Mode 1:
[0x0000:0x0FFC]
ON 4 BYTE BOUNDARIES
Mode 2:
[0x0000:0x0FF0]
ON 16 BYTE BOUNDARIES
Mode 3:
[0x0000:0xFFE]
ON 2 BYTE BOUNDARIES
Mode 1:
[0x0000:0x0FFC]
ON 4 BYTE BOUNDARIES
Mode 2:
[0x0000:0x0FF0]
ON 16 BYTE BOUNDARIES
Mode 3:
[0x0000:0xFFE]
ON 2 BYTE BOUNDARIES
FIXED
BASE OFFSETS
+00 : PME_STS
.
.
.
+1B : PME_EN4
(See Table 9.1 in Chapter 9 Runtime
Registers for Full List)
See Configuration Registers in section 10.3
Configuration Registers Summary on page
165. They are accessed through the index
and DATA ports located at the Configuration
Port address and the Configuration Port
address +1 respectively.
+0 : RB/TB/LSB div
+1 : IER/MSB div
+2 : IIR/FCR
+3 : LCR
+4 : MCR
+5 : LSR
+6 : MSR
+7 : SCR
+0 : RB/TB/LSB div
+1 : IER/MSB div
+2 : IIR/FCR
+3 : LCR
+4 : MCR
+5 : LSR
+6 : MSR
+7 : SCR
+0: X-bus CS1 Address
+0: X-bus CS2 Address
Rev. 0.5 (03-24-05)
Page 216
DATASHEET
SMSC SIO10N268