SI8250 Datasheet, PDF (9/30 Pages) Silicon Laboratories – DIGITAL POWER CONTROLLER

Si8250/1/2
Table 8. DPWM Specifications
TA = –40 to +125 °C, VDD = 2.5 V, SYSCLK = 25 MHz, PLLCLK = 200 MHz unless otherwise specified.
Parameter
Conditions
Min
Typ
Max
Clock Frequency
DPWMSP[4:3] = 00
DPWMSP[4:3] = 01
—
—
200
—
—
50
Resolution
DPWMSP[4:3] = 1x
No dithering
—
—
25
—
—
9
Dithering enabled
—
—
15
Time Resolution
DPWMSP[4:3] = 00
DPWMSP[4:3] = 01
5
—
—
20
—
—
DPWMSP[4:3] = 1x
40
—
—
SYNC Pulse set-up time
SYNC signal minimum LOW time
3
before positive transition
—
—
PH Rise, Fall Time
50pF on pin
—
—
5
Output Resistance High
Output Resistance Low
Shutdown Supply Current
I_OUT = –5 mA
I_OUT = 8 mA
—
75
—
—
40
—
—
—
0.1
Units
MHz
Bits
ns
DPWM
clock cycles
ns
Ω
Ω
µA
Table 9. Bandgap Voltage Reference Specs
TA = –40 to +125 °C, VDD = 2.5 V, SYSCLK = 25 MHz, PLLCLK = 200 MHz unless otherwise specified.
Parameter
Conditions
Min
Typ
Max
Output Voltage
—
1.20
—
Temperature Stability
–1
—
+1
Turn-on Response
(0.01%, 4.7 µF)
—
6.5
—
no load
—
2
—
Noise
4.7 µF
—
2
—
Bandgap Current
—
60
—
Reference Buffer Current
—
30
—
Power supply rejection
—
50
—
Units
V
%
ms
µs
µV (RMS)
µA
µA
dB
Preliminary Rev. 0.8
9