SI8250 Datasheet, PDF (20/30 Pages) Silicon Laboratories – DIGITAL POWER CONTROLLER

Si8250/1/2
Single Phase POL (point of load) converter: A 65 W, 400 KHz Si8252 based single phase POL converter block
diagram is shown in Figure 7. DPWM outputs PH1 and PH2 control the gates of the buck and synchronous
switching transistors. A lossless current sensing method that relies on the resistor and inductance of the inductor is
used to measure the current for over current protection. The input voltage is measured using resistor divider
network and analog input port AIN0 of 12bit, 200 kHz ADC0.
VIN
CIN
DIFFERENTIAL
Ipk
AMPLIFIER
L
C
Vout
DRIVER
+2.5 V
DRIVER
VDD
Ipk
PH1 Vsense
PH2
Ipk
VIN _AIN0
Si8252
GND
Figure 7. Single-phase POL Block Diagram
When power is applied, the CPU executes an internal reset followed by initialization of all parameters. The Si8252
remains in a low-power state, monitoring digitized VIN data until VIN is within specified limits. At this time, the
controller is fully enabled and executes soft-start by monitoring output voltage while sequentially incrementing the
loop voltage reference (REFDAC) until the supply output voltage is within specified range, at which time steady-
state operation begins.
As in the previous half-bridge example, transient response is improved by adjusting loop gain at the onset of a
transient (i.e. nonlinear control). The efficiency of the POL converter can be optimized over the complete load
range by dynamically adjusting the dead-times. Typical efficiency simulation results for the POL are shown in
Figure 8. In this case, the single-phase POL operates at a PWM frequency of 400 kHz with an output voltage of
3.3 V and an input voltage range of 10 to 15 V. The curve shows the efficiency with an input voltage of 12.0 V.
95
90
Eff ( Io)
85
80
0
5
10
15
20
25
Io
Figure 8. POL Efficiency
20
Preliminary Rev. 0.8