SI8250 Datasheet, PDF (7/30 Pages) Silicon Laboratories – DIGITAL POWER CONTROLLER

Si8250/1/2
Table 5. ADC1 Specifications
TA = –40 to +125 °C, VDD = 2.5 V, SYSCLK = 25 MHz, PLLCLK = 200 MHz unless otherwise specified.
Parameter
Conditions
Min
Typ
Max
Sampling Frequency
ADCSP = 0
—
10
—
ADCSP = 1
—
5
—
Resolution
—
—
6
LSB Size
4
—
20
Differential Input Voltage Range
Note 1
–32
—
+31
Common-mode input voltage range
0.8
—
1.3
Integral Nonlinearity
–2
—
+2
Differential Nonlinearity
–1
—
+1
Gain Error
—
5
—
Offset Error
—
3
—
Input Bias Current
—
5
—
Standby Mode Supply Current
disabled
—
0.1
—
Operating Mode Supply Current
—
—
3
Notes:
1. LSB size (mV) is programmable using the RES[3:0] bits in the ADC1CN register.
Units
Msps
Bits
mV
LSB
V
LSB
LSB
%
mV
µA
µA
mA
Table 6. DSP Filter Engine Electrical Specifications
TA = –40 to +125 °C, VDD = 2.5 V, SYSCLK = 25 MHz, PLLCLK = 200 MHz unless otherwise specified.
Parameter
Resolution¹
Dithering²
Conditions
Min
Typ
Max
—
—
9
—
—
6
Standby Mode Supply Current
disabled
—
0.1
—
Notes:
1. Internal word length = 22 bits.
2. Up to a total 15 bits of resolution when dithering is enabled.
Units
Bits
Bits
µA
Preliminary Rev. 0.8
7