C8051F340-GQR Datasheet, PDF (80/276 Pages) Silicon Laboratories – Full Speed USB Flash MCU Family

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
PROGRAM/DATA MEMORY
(FLASH)
0x7FFF
0xFF
FLASH
(In-System
Programmable in 512
Byte Sectors)
0x0000
0x80
0x7F
0x30
0x2F
0x20
0x1F
0x00
DATA MEMORY (RAM)
INTERNAL DATA ADDRESS SPACE
Upper 128 RAM
(Indirect Addressing
Only)
Special Function
Register's
(Direct Addressing Only)
(Direct and Indirect
Addressing)
Bit Addressable
General Purpose
Registers
Lower 128 RAM
(Direct and Indirect
Addressing)
0xFFFF
EXTERNAL DATA ADDRESS SPACE
Off-Chip XRAM
(Available only on devices
with EMIF)
0x0800
0x07FF
0x0000
XRAM - 2048 Bytes
(Accessable using MOVX
instruction)
USB FIFOs
1024 Bytes
Figure 9.3. On-Chip Memory Map for 32 kB Devices
0x07FF
0x0400
9.2.1. Program Memory
The CIP-51 core has a 64k-byte program memory space. The C8051F34x implements 64k or 32k bytes of
this program memory space as in-system, re-programmable Flash memory. Note that on the 64k versions
of the C8051F34x, addresses above 0xFBFF are reserved.
Program memory is normally assumed to be read-only. However, the CIP-51 can write to program memory
by setting the Program Store Write Enable bit (PSCTL.0) and using the MOVX instruction. This feature pro-
vides a mechanism for the CIP-51 to update program code and use the program memory space for
non-volatile data storage. Refer to Section “12. Flash Memory” on page 107 for further details.
80
Rev. 1.3