C8051F340-GQR Datasheet, PDF (134/276 Pages) Silicon Laboratories – Full Speed USB Flash MCU Family

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
SFR Definition 14.3. OSCLCN: Internal L-F Oscillator Control
R/W
R
R/W
OSCLEN OSCLRDY OSCLF3
Bit7
Bit6
Bit5
R
OSCLF2
Bit4
R/W
OSCLF1
Bit3
R/W
OSCLF0
Bit2
R/W
OSCLD1
Bit1
R/W
Reset Value
OSCLD0 00vvvv00
Bit0 SFR Address:
0x86
Bit7:
Bit6:
Bits5–2:
Bits1–0:
OSCLEN: Internal L-F Oscillator Enable.
0: Internal L-F Oscillator Disabled.
1: Internal L-F Oscillator Enabled.
OSCLRDY: Internal L-F Oscillator Ready Flag.
0: Internal L-F Oscillator frequency not stabilized.
1: Internal L-F Oscillator frequency stabilized.
OSCLF[3:0]: Internal L-F Oscillator Frequency Control bits.
Fine-tune control bits for the internal L-F Oscillator frequency. When set to 0000b, the L-F
oscillator operates at its fastest setting. When set to 1111b, the L-F oscillator operates at its
slowest setting.
OSCLD[1:0]: Internal L-F Oscillator Divider Select.
00: Divide by 8 selected.
01: Divide by 4selected.
10: Divide by 2 selected.
11: Divide by 1 selected.
134
Rev. 1.3