C8051F340-GQR Datasheet, PDF (145/276 Pages) Silicon Laboratories – Full Speed USB Flash MCU Family

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
P0
P1
P2
P3
SF Signals
(32-pin
Pa cka ge )
P3.1-P3.7 unavailable on
the 32-pin packages
SF Signals
(48-pin
Pa cka ge )
PIN I/O
TX0
RX0
SCK
MISO
MOSI
NSS*
SDA
SCL
CP0
CP0A
CP1
CP1A
01234567012345670123456701234567
*NSS is only pinned out in 4-wire SPI mode
SYSCLK
CEX0
CEX1
CEX2
CEX3
CEX4
ECI
T0
T1
TX1**
RX1**
**UART1 available only on C8051F340/1/4/5/8/A/B devices
00000000000000000000000000000000
P0SKIP[0:7]
P1SKIP[0:7]
P2SKIP[0:7]
P3SKIP[0:7]
Port pin assigned to peripheral by the Crossbar
Example: XBR0 = 0x07
SF Signals Special Function Signals are not assigned by the Crossbar. When these signals are
XBR1 = 0x43
Figure 15.4. Crossbar Priority Decoder in Example Configuration
(No Pins Skipped)
Rev. 1.3
145