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SI53019-A02A Datasheet, PDF (8/37 Pages) Silicon Laboratories – 19-OUTPUT PCIE GEN3 AND QPI BUFFER
Si53019-A02A
Table 5. Clock Input Parameters
TA = 0–70 °C; supply voltage VDD = 3.3 V ±5%
Parameter
Input High Voltage
Input Low Voltage
Input Common Mode
Voltage
Input Amplitude
Input Slew Rate
Input Duty Cycle
Input Jitter—Cycle to
Cycle
Input Frequency
Input SS Modulation
Rate
Symbol
VIHDIF
VIHDIF
Vcom
Vswing
dv/dt
JDFin
Fibyp
FiPLL
FiPLL
fMODIN
Conditions
Differential Inputs
(singled-ended measurement)
Differential Inputs
(singled-ended measurement)
Common mode input voltage
Min
Typ
600
800
VSS–300 0
300
Peak to Peak Value
300
Measured differentially
0.4
Measurement from differential wave
45
50
form
Differential measurement
VDD = 3.3 V, bypass mode
33
VDD = 3.3 V, 100 MHz PLL Mode
90
100
VDD = 3.3 V, 133.33 MHz PLL Mode 120 133.33
Triangle Wave modulation
30
31.5
Max
1150
300
1000
1450
8
55
125
150
110
147
33
Unit
mV
mV
mV
mV
V/ns
%
ps
MHz
MHz
MHz
kHz
8
Rev. 1.1