SI53019-A02A Datasheet, PDF (29/37 Pages) Silicon Laboratories – 19-OUTPUT PCIE GEN3 AND QPI BUFFER

Pin #
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
Si53019-A02A
Table 30. Si53019-A02A 72-Pin QFN Descriptions
Name
DIF_2
DIF_2
GND
DIF_3
DIF_3
DIF_4
DIF_4
VDD
DIF_5
DIF_5
OE5
DIF_6
DIF_6
OE6
DIF_7
DIF_7
OE7
DIF_8
DIF_8
OE8
GND
VDD
DIF_9
DIF_9
OE9
DIF_10
Type
Description
O, DIF 0.7 V Differential TRUE clock output.
O, DIF 0.7 V Differential Complimentary clock output.
GND Ground for outputs.
O, DIF 0.7 V Differential TRUE clock output.
O, DIF 0.7 V Differential Complimentary clock output.
O, DIF 0.7 V Differential TRUE clock output.
O, DIF 0.7 V Differential Complimentary clock output.
3.3 V 3.3 V power supply
O, DIF 0.7 V Differential TRUE clock output.
O, DIF 0.7 V Differential Complimentary clock output.
IN Active low input for enabling DIF pair 5
1 = disable outputs, 0 = enable outputs
O, DIF 0.7 V Differential TRUE clock output.
O, DIF 0.7 V Differential Complimentary clock output.
IN Active low input for enabling DIF pair 6
1 = disable outputs, 0 = enable outputs
O, DIF 0.7 V Differential TRUE clock output.
O, DIF 0.7 V Differential Complimentary clock output.
IN Active low input for enabling DIF pair 7
1 = disable outputs, 0 = enable outputs
O, DIF 0.7 V Differential TRUE clock output.
O, DIF 0.7 V Differential Complimentary clock output.
IN Active low input for enabling DIF pair 8
1 = disable outputs, 0 = enable outputs
GND Ground for outputs.
3.3 V 3.3 V power supply
O, 0.7 V Differential TRUE clock output.
DIF
O, 0.7 V Differential Complimentary clock output.
DIF
IN Active low input for enabling DIF pair 9
1 = disable outputs, 0 = enable outputs
O, DIF 0.7 V Differential TRUE clock output.
Rev. 1.1
29