SI53019-A02A Datasheet, PDF (33/37 Pages) Silicon Laboratories – 19-OUTPUT PCIE GEN3 AND QPI BUFFER

Si53019-A02A
8. Package Outline
Figure 13 illustrates the package details for the Si53019-A02A. Table 31 lists the values for the dimensions shown
in the illustration.
Figure 13. 72-Pin Quad Flat No Lead (QFN) Package
Table 31. Package Diagram Dimensions^1,2,3,4
Dimension
Min
Nom
Max
Dimension
Min
A
0.80
0.85
0.90
E2
5.90
A1
0.00
0.02
0.05
L
0.30
b
0.18
0.25
0.30
aaa
0.10
D
10.00 BSC.
bbb
0.10
D2
5.90
6.00
6.10
ccc
0.08
e
0.50 BSC.
ddd
0.10
E
10.00 BSC.
eee
0.05
Nom
6.00
0.40
Max
6.10
0.50
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to JEDEC outline MO-220.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components.
Rev. 1.1
33