SI53019-A02A Datasheet, PDF (14/37 Pages) Silicon Laboratories – 19-OUTPUT PCIE GEN3 AND QPI BUFFER

Si53019-A02A
Table 13. Tri-Level Input Thresholds
Parameter
Low
Mid
High
Voltage
< 0.8 V
1.2 < Vin < 1.8 V
Vin > 2.2 V
Table 14. Power Connections
Pin Number
V_DD
GND
1
2
8
7
21,31,45,58,68
26,44,63
Description
Analog PLL
Analog Input
DIF Outputs
Table 15. SMBus Addressing
SMB_A1
0
0
0
M
M
M
1
1
1
Pin
SMB_A0
0
M
1
0
M
1
0
M
1
SMBus
Address
D8
DA
DE
C2
C4
C6
CA
CC
CE
14
Rev. 1.1