SI53019-A02A Datasheet, PDF (30/37 Pages) Silicon Laboratories – 19-OUTPUT PCIE GEN3 AND QPI BUFFER

Si53019-A02A
Pin #
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
Table 30. Si53019-A02A 72-Pin QFN Descriptions
Name
DIF_10
OE10
DIF_11
DIF_11
OE11
DIF_12
DIF_12
OE12
VDD
DIF_13
DIF_13
DIF_14
DIF_14
GND
DIF_15
DIF_15
DIF_16
DIF_16
VDD
DIF_17
DIF_17
DIF_18
DIF_18
GND
Type
Description
O, DIF 0.7 V Differential Complimentary clock output.
IN Active low input for enabling DIF pair 10
1 = disable outputs, 0 = enable outputs
O, DIF 0.7 V Differential TRUE clock output.
O, DIF 0.7 V Differential Complimentary clock output.
IN Active low input for enabling DIF pair 11
1 = disable outputs, 0 = enable outputs
O, DIF 0.7 V Differential TRUE clock output.
O, DIF 0.7 V Differential Complimentary clock output.
IN Active low input for enabling DIF pair 12
1 = disable outputs, 0 = enable outputs
3.3 V 3.3 V power supply
O, DIF 0.7 V Differential TRUE clock output.
O, DIF 0.7 V Differential Complimentary clock output.
O, DIF 0.7 V Differential TRUE clock output.
O, DIF 0.7 V Differential Complimentary clock output.
GND Ground for outputs.
O, DIF 0.7 V Differential TRUE clock output.
O, DIF 0.7 V Differential Complimentary clock output.
O, DIF 0.7 V Differential TRUE clock output.
O, DIF 0.7 V Differential Complimentary clock output.
3.3 V 3.3 V power supply
O, DIF 0.7 V Differential TRUE clock output.
O, DIF 0.7 V Differential Complimentary clock output.
O, DIF 0.7 V Differential TRUE clock output.
O, DIF 0.7 V Differential Complimentary clock output.
GND Ground for outputs.
30
Rev. 1.1