SI53019-A02A Datasheet, PDF (35/37 Pages) Silicon Laboratories – 19-OUTPUT PCIE GEN3 AND QPI BUFFER

Si53019-A02A
Table 32. Package Diagram Dimensions^1,2,3,4
Dimension
mm
C1
9.90
C2
9.90
E
0.50
X1
0.30
Y1
0.85
X2
6.10
Y2
6.10
Notes:
General
1. All dimensions shown are in millimeters (mm).
2. This Land Pattern Design is based on the IPC-7351 guidelines.
3. All dimensions shown are at Maximum Material Condition (MMC). Least Material Condition
(LMC) is calculated based on a Fabrication Allowance of 0.05mm.
Solder Mask Design
1. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder mask
and the metal pad is to be 60?m minimum, all the way around the pad.
Stencil Design
1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to
assure good solder paste release.
2. The stencil thickness should be 0.125mm (5 mils).
3. The ratio of stencil aperture to land pad size should be 1:1 for all pads.
4. A 3x3 array of 1.45mm square openings on a 2.00mm pitch should be used for the center
ground pad.
Card Assembly
1. A No-Clean, Type-3 solder paste is recommended.
2. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small
Body Components.
Rev. 1.1
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