SI53019-A02A Datasheet, PDF (13/37 Pages) Silicon Laboratories – 19-OUTPUT PCIE GEN3 AND QPI BUFFER

2. Functional Description
Si53019-A02A
OE(5_12)
8
CLK_IN
CLK_IN
100M_133
HBW_BYPASS_LBW
SA_0
SA_1
PWRGD / PWRDN
SDA
SCL
SSC Compatible
PLL
Control
Logic
FB_OUT
DIF_[18:0]
IREF
Note: FB_OUT pins must be identically terminated to the other DIF outputs.
Figure 1. Si53019-A02A Functional Block Diagram
Table 11. Functionality at Powerup (PLL Mode)
100M_133M
1
0
CLK_IN (MHz)
100
133.33
DIF
CLK_IN
CLK_IN
Table 12. PLL Operating Mode Readback Table
HBW_BYPASS_LBW
Low
Mid (Bypass)
High
Byte 0, Bit 7 Byte 0, Bit 6
0
0
0
1
1
1
Mode
PLL Low BW
Bypass
PLL High BW
Rev. 1.1
13