SI5376 Datasheet, PDF (62/66 Pages) Silicon Laboratories – 4-PLL ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Si5376
10. Package Outline
Figure 10 illustrates the package details for the Si5376. Table 11 lists the values for the dimensions shown in the
illustration. Visit www.silabs.com/support/quality/pages/RoHSInformation.aspx for more environmental information
about the package.
Figure 10. 80-Pin Plastic Ball Grid Array (PBGA)
Table 11. Package Dimensions
Symbol
A
A1
A2
A3
b
D
E
D1
Min
Nom
Max
1.22
1.39
1.56
0.40
0.50
0.60
0.32
0.36
0.40
0.46
0.53
0.60
0.50
0.60
0.70
10.00 BSC
10.00 BSC
8.00 BSC
Min
Nom
Max
E1
8.00 BSC
e
1.00 BSC
aaa
0.10
bbb
0.10
ccc
0.12
ddd
0.15
eee
0.08
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to JEDEC outline MO-192.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body
Components.
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