SI5376 Datasheet, PDF(6/66 Page) Silicon Laboratories – 4-PLL ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

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SI5376 Datasheet, PDF (6/66 Pages) Silicon Laboratories – 4-PLL ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

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Si5376

Table 2. DC Characteristics (Continued)

(VDD = 1.8 Â± 5%, 2.5 Â±10%, TA = â40 to 85 Â°C)

Parameter

Single Ended Output

Swing

Differential Output

Voltage

Common Mode Output

Voltage

Differential Output

Voltage

Symbol

CKOVSE

CKOVD

CKOVCM

CKOVD

Common Mode Output CKOVCM

Voltage

Differential Output

Resistance

CKORD

Output Voltage Low

CKOVOLLH

Test Condition

LVPECL 100 ï load

line-to-line

CML 100 ï load

line-to-line

CML 100 ï load

line-to-line

LVDS

100 ï load line-to-line

Low Swing LVDS

100 ï load line-to-line

LVDS 100 ïï load

line-to-line

CML, LVPECL, LVDS

CMOS

Min

Typ

0.5

350

425

VDDâ0.36

500

700

350

425

1.125

1.2

200

Output Voltage High CKOVOHLH

VDD = 1.71 V

CMOS

0.8 x

VDD

Output Drive Current

CKOIO

ICMOS[1:0] = 11

(CMOS driving into

VDD = 1.8 V

CKOVOL for output low

or CKOVOH for output

high. CKOUT+ and

ICMOS[1:0] = 10

VDD = 1.8 V

CKOUTâ shorted

externally)

ICMOS[1:0] = 01

VDD = 1.8 V

ICMOS[1:0] = 00

VDD = 1.8 V

ICMOS[1:0] = 11

VDD = 2.5 V

ICMOS[1:0] = 10

VDD = 2.5 V

ICMOS[1:0] = 01

VDD = 2.5 V

ICMOS[1:0] = 00

VDD = 2.5 V

Notes:

1. Current draw is independent of supply voltage.

2. No under- or overshoot is allowed.

3. LVPECL outputs require nominal VDD = 2.5 V.

4. LVPECL, CML, LVDS and low-swing LVDS measured with Fo = 622.08 MHz.

7.5

5.5

3.5

1.75

Max

0.93

500

900

500

1.275

0.4

Unit

VPP

mVPP

Rev. 1.0

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