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SI5376 Datasheet, PDF (5/66 Pages) Silicon Laboratories – 4-PLL ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR | |||
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Si5376
Table 2. DC Characteristics
(VDD = 1.8 ± 5%, 2.5 ±10%, TA = â40 to 85 °C)
Parameter
Supply Current1
Symbol
Test Condition
Min
Typ
IDD
LVPECL Format
â
1000
622.08 MHz Out
All CKOUTs Enabled
LVPECL Format
â
870
622.08 MHz Out
4 CKOUTs Enabled
CMOS Format
â
820
19.44 MHz Out
All CKOUTs Enabled
CMOS Format
â
780
19.44 MHz Out
4 CKOUTs Enabled
Disable Mode
â
660
CKINn Input Pins2
Input Common Mode
Voltage (Input Thresh-
old Voltage)
VICM
1.8 V ± 5%
2.5 V ± 10%
0.9
â
1
â
Input Resistance
CKNRIN
Single-ended
20
40
Single-Ended Input
Voltage Swing
VISE
(See Absolute Specs)
Differential Input
VID
Voltage Swing
(See Absolute Specs)
fCKIN < 212.5 MHz
0.2
â
See Figure 1.
fCKIN > 212.5 MHz
0.25
â
See Figure 1.
fCKIN < 212.5 MHz
0.2
â
See Figure 1.
fCKIN > 212.5 MHz
0.25
â
See Figure 1.
Output Clocks (CKOUTn)3,4
Common Mode
CKOVCM
LVPECL 100 ï load
VDD â
â
line-to-line
1.42
Differential Output
CKOVD
LVPECL 100 ï load
1.1
â
Swing
line-to-line
Notes:
1. Current draw is independent of supply voltage.
2. No under- or overshoot is allowed.
3. LVPECL outputs require nominal VDD = 2.5 V.
4. LVPECL, CML, LVDS and low-swing LVDS measured with Fo = 622.08 MHz.
Max
1100
970
940
880
â
1.4
1.7
60
â
â
â
â
VDD â1.25
1.9
Unit
mA
mA
mA
mA
mA
V
V
kï
VPP
VPP
VPP
VPP
V
VPP
Rev. 1.0
5
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