SI47XX-EVB Datasheet, PDF (50/164 Pages) Silicon Laboratories – Thank you for purchasing the Silicon Laboratories

Si47xx-EVB
5.8. SPDIF Settings
In addition to other digital mode properties, a category of SPDIF settings may be configured by selecting
WindowPropertiesSPDIF Settings if SPDIF mode was selected in the initialization window.
Note: SPDIF will not be supported on new EVBs as of February 14, 2011. These properties will not be available through the
GUI in conjunction with those boards.
Figure 42. SPDIF Settings Property Window
Table 12. SPDIF Settings Property Window Descriptions
Item
Description
Range
Misc.
SPDIF Invert Clock _{Select between using rising edge or falling edge of DCLK when}
sampling Digital Input (DIN) data.
SPDIF Output Format _{Select the SPDIF digital audio format between I}²_{S or Left Justified.}
On/Off
Left-Justified or I²S
50
Rev. 0.8