SI47XX-EVB Datasheet, PDF (12/164 Pages) Silicon Laboratories – Thank you for purchasing the Silicon Laboratories

Si47xx-EVB
2.1.3. Reference Clock
Daughterboard
Jumper
J57
DIS_INT_RCLK
X1
32.768 kHz
INT RClk
Jumper
INT_RCLK
J52
EXT_RCLK
Si47xx
9
RCLK
J54
EXT
RClk
Figure 6. Reference Clock Block Diagram
The Si47xx accepts a 32.768 kHz reference clock at the RCLK pin. On the EVB, this clock is provided by a
precision crystal oscillator. The user has the option of not using the onboard oscillator and bringing in the reference
clock from an external source through SMA connector J54.
When the user chooses to provide an external RCLK, jumper J52 has to be set accordingly. The user has the
option to turn off the onboard crystal oscillator by installing jumper J57.
2.1.4. Audio I/O
EVB In (TX only)
TX: Analog/Digital In
47xx Audio2
TX: Analog In
RX: Digital Out
47xx Audio1
TX: Digital In
RX: Analog Out
EVB Out (RX only)
RX: Analog/Digital Out
J7
RCA In
Jumper
J5&J13
Audio2
Select
AUDIO2
AUDIO1
Audio1
Select
J19
Line In
(white)
J19
SPDIF In
(white)
1
16 LIN/ DFS2 LOUT/ DFS1 14
0
0
0
15 RIN/ DOUT ROUT/ DIN 13
1
1
CODEC IN
LINE _DOUT
IN
0
To_TX
AUDIO2
1
S/PDIF IN
SPDIF
IN
DOUT
Digital Input
Select
Jumper
J45
From_RX
Si47xx
(Daughterboard)
AUDIO1
To_TX
Jumper
J44
CODEC OUT
DIN ^LINE
OUT
From_RX
S/PDIF OUT
SPDIF
DIN _OUT
Note: Jumper J44 and J45 are automatically configured in EVB Rev 1.3.
J6
RCA Out
J30
Line Out
(black)
J30
SPDIF Out
(black)
Figure 7. Audio I/O Block Diagram
12
Rev. 0.8