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SI47XX-EVB Datasheet, PDF (102/164 Pages) Silicon Laboratories – Thank you for purchasing the Silicon Laboratories
Si47xx-EVB
Table 26. AM Receiver Property Window Descriptions
Name
Description
Range
Applicable
Devices
AGC Attack Rate Sets the AGC attack rate. Larger values provide
slower attack and smaller values provide faster
4–248
Si4740/41/42/43/
44/45
attack.
AGC Frontend Sets gain index backup (ATTN_BACKUP) for exter-
0–28
Attn. Backup nal attenuator. For Si4743EVB, 12 and 20 are recom- (AM Component
Steps
mended for "Passive" and "Active" external
2.E.5)
Si4740/41/42/43/
44/45
attenuators, respectively.
AGC Frontend Sets minimum gain index. For Si4743EVB, 19 is rec-
0–28
Si4740/41/42/43/
Min. Gain Index ommended.
(AM Component
44/45
2.E.5)
AGC Index Sets gain index when "AGC Override" is On.
0–
All
37+ATTN_BACKU
P
AGC Override When "Off", AGC is enabled. When "On", AGC is dis-
ON/OFF
All
abled and gain index is forced to "AGC Index"
AGC Release Sets the AGC release rate. Larger values provide
Rate
slower release and smaller values provide faster
4–248
Si4740/41/42/43/
44/45
release.
External For Si474x-EVB daughtercard versions > 1.2. When ACTIVE, PASSIVE Si4740/41/42/43/
Attenuator Select using an antenna, set this property to PASSIVE. If
44/45
you are connecting a signal generator directly, set
this to ACTIVE.
Auto Volume Sets the maximum gain allowed for automatic volume
Cont. Max Gain control.
(dB)
6.02–90.3 dB
Si473x-C40 and
later, Si474x
De-Emphasis De-emphasis filter setting allows the user to select
ON/OFF
All
whether to turn on/off the de-emphasis filter.
Power Line Noise ON enables high pass filter to filter out the 50/60 Hz
Filter
tone.
ON/OFF
Si473x-C40 and
later, Si4740/41/42/
43/44/45
Reference Clock This field is used to specify the frequency of the refer- 31130–34406 Hz
All
Frequency (Hz) ence clock. The Reference clock frequency divided
by the pre-scalar must be in the range of 31.130 to
34.406 kHz.
Reference Clock Reference Clock Pre-scalar divides down RCLK fre-
1–4095
All
Prescaler quency by the value specified in this field. The Refer-
ence clock frequency divided by the pre-scalar must
be in the range of 31.130 to 34.406 kHz.
Digital DCLK ON uses falling edge of DCLK for sampling.
Falling Edge
ON, OFF
Si4705/06,
Si4731/35/37/39,
Si4730/34/36/38-
D60 and later,
Si4741/43/45,
Si4784/85
102
Rev. 0.8