SI53320 Datasheet, PDF (22/25 Pages) Silicon Laboratories – 1:5 LOW JITTER LVPECL CLOCK BUFFER

Si53320
6. PCB Land Pattern
6.1. 20-TSSOP Package Land Pattern
Figure 14. Si53320 20-TSSOP Package Land Pattern
Table 15. PCB Land Pattern
Dimension
C1
Feature
Pad Column Spacing
(mm)
5.80
E
Pad Row Pitch
0.65
X1
Pad Width
0.45
Y1
Pad Length
1.40
Notes:
1. This Land Pattern Design is based on IPC-7351
specifications for Density Level B (Median Land Protrusion)
2. All feature sizes shown are at Maximum Material Condition
(MMC) and a card fabrication tolerance of 0.05 mm is
assumed.
22
Rev. 1.0