SI5110 Datasheet, PDF (18/26 Pages) Silicon Laboratories – SiPHY™ OC-48/STM-16 SONET/SDH TRANSCEIVER

Si5110
Pin Descriptions: Si5110
Pin
Number(s)
H6
Name
BWSEL
H7
DLBK
J5
FIFOERR
H5
FIFORST
B2, C2, D1,
E2, E7–9,
F2, F7–9,
G1, H2, J2,
K1
H8
GND
LLBK
D2
LOS
B3
LOSLVL
I/O
I
I
O
I
GND
Signal Level
Description
LVTTL
LVTTL
LVTTL
LVTTL
Bandwidth Select DSPLL.
This input selects loop bandwidth of the DSPLL.
BWSEL = 0: Loop bandwidth set to 6 kHz.
BWSEL = 1: Loop bandwidth set to 25 kHz.
Diagnostic Loopback.
When this input is active low the transmit clock and
data are looped back for output on RXDOUT, RXCLK1
and RXCLK2. This pin should be held high for normal
operation.
FIFO Error.
This output is driven high when a FIFO over-
flow/underflow has occurred. This output will stick high
until reset by asserting FIFORST.
FIFO RESET.
This input when asserted high resets the read/write
FIFO pointers to their initial state.
Supply Ground.
I
LVTTL
Line Loopback.
When this input is active low the recovered clock and
data are looped back for output on TXDOUT, and
TXCLKOUT. This pin should be held high for normal
operation.
O
LVTTL
Loss-of-Signal.
This output is driven low when the peak-to-peak signal
amplitude is below threshold set via LOSLVL.
I
LOS Threshold Level.
Applying an analog voltage to this pin allows adjust-
ment of the Threshold used to declare LOS. Tieing
this input high disables LOS detection and forces the
LOS output high.
18
Preliminary Rev. 0.41