S-77100 Datasheet, PDF (5/40 Pages) Seiko Instruments Inc – POWER SEQUENCER

Rev.1.0_01
POWER SEQUENCER
S-77100/77101 Series
 Pin Functions
1. ON pin
This is a trigger input pin to start the sequence operation.
In the S-77100 Series, the on-sequence operation is performed when the rising signal is detected. The
off-sequence operation is performed when the falling signal is detected.
In the S-77101 Series, the on-sequence operation is performed when the rising signal is detected.
Refer to "1. Sequence operation" in " Operation" for details.
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2. OFF pin (S-77101 Series only)
This is a trigger input pin to start the off-sequence operation. The off-sequence operation is performed when the
falling signal is detected. Refer to "1. Sequence operation" in " Operation" for details.
3. ENBL_A, ENBL_B, ENBL_C, ENBL_D pins (ENBL_D pin is S-77100 Series only)
These are pins to output the enable signals to the external power supply circuits.
The ENBL_x pin output form of Nch open-drain output / CMOS output can be selected as the option. Moreover, the
ENBL_x pin output logic of active "H" / active "L" can be selected as the option.
Refer to "1. Sequence operation" in " Operation" for the sequence operation, "2. Product option list" in
" Product Name Structure" for the options.
4. CDLY pin
This is a pin for connecting the external capacitor (CDLY) in order to generate the delay time (tDLY) of the
on-sequence operation and the off-sequence operation. CDLY is charged and discharged by the constant current
circuit.
The charge-discharge operation starts when the ON pin rises, the period from the starting to the ENBL_A pin rising
is tDLY which is generated by the S-77100/77101 Series.
Refer to "1. Sequence Operation" in " Operation" for the operation timing, " Relation between Delay Time
and External Capacitor" for the delay time.
5. VDD pin
Connect this pin with a positive power supply. Refer to " Electrical Characteristics" for the values of voltage to be
applied.
6. VSS pin
Connect this pin to GND.
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