S-77100 Datasheet, PDF (3/40 Pages) Seiko Instruments Inc – POWER SEQUENCER

Rev.1.0_01
POWER SEQUENCER
S-77100/77101 Series
 Product Name Structure
_______
Users can select the presence of the OFF pin, order of enable output, and output form, etc. for the S-77100/77101
Series. Refer to "1. Product name" regarding the contents of product name, "2. Product option list" regarding the
product type, "3. Packages" regarding the package drawings.
1. Product name
S-7710 x x xx - xxxx U 4
Environmental code
U:
Lead-free (Sn 100%), halogen-free
Package abbreviation and IC packing specifications^*1
T8T1: 8-Pin TSSOP, Tape
I8T1: SNT-8A, Tape
Option code 2^*2
Option code 1^*3
A:
Reverse type
B:
Forward type
Number of channel
_______
0:
4 channels (witho_{_}u_{_}t_{___}O_{__} FF pin)
1:
3 channels (with OFF pin)
*1. Refer to the tape drawing.
*2. Code added by the optional function that is user-selected.
Refer to "2. Product option list" for the kinds of options.
Please contact our sales office for the option code 2.
*3. Refer to "2. Product option list".
2. Product option list
Option
Table 1
Description
Order of enable output
(Option code 1)
Number of times of
external capacitor (CDLY)
charge and discharge
(Option code 2)
Input level
(Option code 2)
Output form
(Option code 2)
Output logic
(Option code 2)
The order that the enable output (ENBL_x pin) inverts during off-sequence period can be
selected.
The S-77100 Series
A: The ENBL_D pin, the ENBL_C pin, the ENBL_B pin and the ENBL_A pin change to
"L" in turn.
B: The ENBL_A pin, the ENBL_B pin, the ENBL_C pin and the ENBL_D pin change to
"L" in turn.
The S-77101 Series
A: The ENBL_C pin, the ENBL_B pin and the ENBL_A pin change to "L" in turn.
B: The ENBL_A pin, the ENBL_B pin and the ENBL_C pin change to "L" in turn.
Option for the delay time (tDLY) adjustment.
The number of times of CDLY charge and discharge can be selected.
2 times / 4 times / 8 times / 16 times
This datasheet describes the example when "4 times" is selected.
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Input level of the ON pin and the OFF pin can be selected.
Schmitt trigger input / Comparator input
Output form of the ENBL_x pin can be selected.
CMOS output / Nch open-drain output
Output logic of the ENBL_x pin can be selected.
Active "H": The type which is "H" during power-good period. /
Active "L": The type which is "L" during power-good period.
This datasheet describes the example when active "H" is selected.
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