S-77100 Datasheet, PDF (12/40 Pages) Seiko Instruments Inc – POWER SEQUENCER

POWER SEQUENCER
S-77100/77101 Series
Rev.1.0_01
2. Cascade connection
2. 1 S-77100B (Forward type)
The enable output can be increased by connecting S-77100B in cascade. The peripheral circuit connection
example how two S-77100B devices are connected in cascade is shown in Figure 11.
Connect the ENBL_D pin of S-77100B(1) and the ON pin of S-77100B(2).
Figure 12 shows the timing chart.
5 V AUX
DC-DC
LDO
IN OUT _{3.3 V}
S-77100B(1)
3.3 V
0.1 F
VDD
ENBL_A
ON
ENBL_B
ENBL_C
CDLY
ENBL_D
VSS
IN OUT
EN
DC-DC
LDO
IN OUT
EN
DC-DC
LDO
2.5 V
DC-DC
LDO _{1.8 V}
IN OUT
EN
DC-DC ^{1.5 V}
IN
LDO
OUT
1.1 V
EN
I/O
LOGIC
MEMORY
CORE
SoC1
S-77100B(2)
3.3 V
0.1 F
VDD
ENBL_A
ON
ENBL_B
ENBL_C
CDLY
ENBL_D
VSS
IN OUT
EN
DC-DC
LDO
IN OUT
EN
DC-DC
LDO
System
2.5 V
DC-DC
LDO _{1.8 V}
IN OUT
EN
DC-DC ^{1.5 V}
IN
LDO
OUT
1.1 V
EN
I/O
LOGIC
MEMORY
CORE
SoC2
Remark The ENBL_x pin is CMOS output.
Figure 11 Peripheral Circuit Connection Example (S-77100B: Forward Type)
Caution 1.
2.
3.
The input should be performed after the power supply voltage applied to S-77100B becomes
stable condition.
The above connection diagram does not guarantee successful operation. Perform thorough
evaluation using the actual application to set the constant.
The external capacitors (CDLY) connected to the CDLY pin of S-77100B(1) and S-77100B(2)
cannot use the same capacitor.
12