S-77100 Datasheet, PDF (28/40 Pages) Seiko Instruments Inc – POWER SEQUENCER

POWER SEQUENCER
S-77100/77101 Series
 UVLO (under voltage lock out) Operation
The power supply voltage range and the output pin status are shown in Figure 31.
Rev.1.0_01
VDD
5.5 V
Operation guaranteed voltage
2.2 V
VUVLO (2.0 V typ.)
1.3 V typ.
Output pin fixed
UVLO detection

Output pin unstable
Figure 31
In the S-77100/77101 Series, the output pin status is not guaranteed when the power supply voltage (VDD) is equal to
or lower than 1.3 V typ. The output pin status is fixed when VDD rises and exceeds 1.3 V typ.
The sequence operation is invalid when VDD is equal to or lower than VUVLO. VDD is operation voltage when it exceeds
VUVLO, however, the operation guaranteed voltage as the power sequencer is 2.2 V to 5.5 V.
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