S-7600A Datasheet, PDF (4/60 Pages) Seiko Instruments Inc – Hardware Specification (TCP/IP Network Stack LSI)

TCP/IP Network Stack LSI
S-7600A
Hardware Specification Revision 1.3
7.3.10.
7.3.11.
7.3.12.
7.3.13.
7.3.14.
7.3.15.
7.3.16.
7.3.17.
7.3.18.
7.3.19.
7.3.20.
7.3.21.
7.3.22.
7.3.23.
7.3.24.
7.3.25.
7.3.26.
7.3.27.
7.3.28.
7.3.29.
7.3.30.
7.3.31.
7.3.32.
7.3.33.
7.3.34.
Our IP Address Registers (0x10-0x13) ...................................................................... 7-9
Clock Divider Registers (0x1C-0x1D) ...................................................................... 7-10
Index Register (0x20) ............................................................................................... 7-10
Type of Service Register (TOS) (0x21) .................................................................... 7-10
Socket Config Status Low Register (0x22)............................................................... 7-11
Socket Status Mid Register (0x23)........................................................................... 7-13
Socket Activate Register (0x24) ............................................................................... 7-14
Socket Interrupt Register (0x26) .............................................................................. 7-14
Socket Data Available Register (0x28)..................................................................... 7-15
Socket Interrupt Mask Low Register (0x2A)............................................................. 7-16
Socket Interrupt Mask High Register (0x2B)............................................................ 7-16
Socket Interrupt Low Register (0x2C) ...................................................................... 7-17
Socket Interrupt High Register (0x2D) ..................................................................... 7-17
Socket Data Register (0x2E).................................................................................... 7-18
TCP Data Send and Buffer Out Length Registers (0x30-0x31) ............................... 7-18
Buffer In Length Registers (0x32-0x33) ................................................................... 7-18
Urgent Data Pointer Registers (0x34-0x35) ............................................................. 7-18
Their Port Registers (0x36-0x37) ............................................................................. 7-19
Our Port Registers (0x38-0x39) ............................................................................... 7-19
Socket Status High Register (0x3A)......................................................................... 7-19
Their IP Address Registers (0x3C-0x3F) ................................................................. 7-20
PPP Control and Status Register (0x60).................................................................. 7-21
PPP Interrupt Code (0x61) ....................................................................................... 7-22
PPP Max Retry, (0x62).............................................................................................. 7-22
PAP String (0x64)..................................................................................................... 7-23
8. DATA COMMUNICATIONS.......................................................................................................... 8-1
8.1. OVERVIEW ............................................................................................................................... 8-1
8.2. SERIAL PORT REGISTER MAP ................................................................................................... 8-1
8.2.1. Hardware Flow Control (RTS/CTS Handshaking) .......................................................... 8-2
8.2.2. Serial Port Control........................................................................................................... 8-2
8.3. TCP/UDP DATA COMMUNICATIONS.......................................................................................... 8-3
8.3.1. TCP Data Communications ............................................................................................ 8-3
8.3.2. UDP Data Communications ............................................................................................ 8-4
9. RESET FUNCTIONS .................................................................................................................... 9-1
9.1. OVERVIEW ............................................................................................................................... 9-1
9.1.1. Hardware Reset Function ............................................................................................... 9-1
9.1.2. Software Reset Function................................................................................................. 9-1
10. APPLICATION EXAMPLES........................................................................................................ 10-1
10.1.1. In Case of x80 Family MPU with LCD Controller .......................................................... 10-1
10.1.2. In Case of 68k Family MPU with LCD Controller .......................................................... 10-2
10.1.3. In Case of Serial Interface with LCD Controller ............................................................ 10-3
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Seiko Instruments Inc.