SDA9189X Datasheet, PDF (7/55 Pages) Siemens Semiconductor Group – Quarter PIP Processor

Quarter PIP Processor
SDA 9189X
Data Sheet
1.1 Features
• High system integration
Filtering, field memory, RGB-matrix,
DA-Conversion, clock generation, and control
circuits integrated on one chip
• 4 picture sizes
1/4th, 1/9th, 1/16th, or 1/36th of normal size
• High resolution display
P-DSO-32-2
13.5 MHz/27 MHz display clock frequency
288 luminance and 72 chrominance pixels per inset line for picture size 1/4
6-bit amplitude resolution for each incoming signal component
Frame mode display in single-PIP modes
Horizontal and vertical filtering
Special antialias filtering for the luminance signal
• Single and multi PIP display
Up to 9 pictures of 1/36th size (8 still and 1 moving)
Up to 4 pictures of 1/16th size (3 still and 1 moving)
Up to 2 pictures of 1/9th size (1 still and 1 moving)
Up to 3 pictures of 1/9th size (2 still and 1 moving) as POP display in 16:9 TV sets
(In multi-PIP modes only field mode display possible)
• Multistandard applications
Automatic recognition of 625 lines/525 lines standard (inset and parent channel)
Scan conversion systems as flickerfree display systems (parent channel)
• HDTV (parent channel)
• 16:9 compatibility
Operation in 4:3 and 16:9 TV sets
4:3 inset signals on 16:9 displays (picture size 1/4 and 1/9)
16:9 inset signals on 4:3 displays (picture size 1/9 and 1/16)
Type
SDA 9189X
Semiconductor Group
Ordering Code
Q67100-H5148
7
Package
P-DSO-32-2
03.96