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SDA9189X Datasheet, PDF (22/55 Pages) Siemens Semiconductor Group – Quarter PIP Processor
SDA 9189X
2.3.3 Memory Reading and Synchronization to Parent Channel
The reading frequency is normally 13.5 MHz and 27 MHz for scan conversion systems.
For progressive scan conversion systems and HDTV displays a line doubling mode is
available (LINEDBL). Every line of the inset picture is read twice.
Synchronization of memory reading with the parent channel is achieved by processing
the parent horizontal and vertical synchronization signals. These signals are fed to the
IC at pin HSP for horizontal synchronization and at pin VSP for vertical synchronization.
A numerical PLL circuit generates a clock signal that is locked to the horizontal
synchronization pulses of the parent channel. The burst gate of the sandcastle signal
can be used for horizontal synchronization.
A field number detection is carried out for the inset channel as well as for the parent
channel. Depending on the phase difference between inset and parent signals a
correction of the display raster for the read out data is performed by omitting or inserting
lines when the read address counter outruns the write address counter.
2.4 Output Signal Processing
2.4.1 Display Position
The display position of the inset picture is freely programmable (POSHOR, POSVER).
The first possible picture position (without frame) is 55 clock periods (13.5 MHz or
27 MHz) after the horizontal and 7 lines after the vertical synchronization pulses.
Starting at this position the picture can be moved over the whole display area. Even POP
positions (Picture Outside Picture) can be used.
Note: Display without disturbances is only possible if the complete PIP picture is inside
the visible area of the picture tube
POSHOR < 1
POSHOR < 864 – 2 × FRWIDH – PSH – 42
POSVER < 262 – 2 × FRWIDV – PSV – 8
POSVER < 312 – 2 × FRWIDV – PSV – 8
(60 Hz mode) or
(50 Hz mode)
POS …
FRWID.
PSH
PSV
= Picture Position (see I2C Bus)
= Frame Width (see I2C Bus)
= Picture size horizontal (number of pixels)
= Picture size vertical (number of line)
Semiconductor Group
22
03.96