SDA9189X Datasheet, PDF (38/55 Pages) Siemens Semiconductor Group – Quarter PIP Processor

SDA 9189X
Detailed Description (cont’d)
Bit
Name
Function
Subaddress 0E
D7 … D4 PEDESTV
D3 … D0 PEDESTU
4-bit pedestal value for chrominance component (R-Y)
fed to corresponding DAC during line-blanking interval
(2’s complement code, – 8 to + 7 LSBs of DAC)
4-bit pedestal value for chrominance component (B-Y)
fed to corresponding DAC during line blanking interval
(2’s complement code, – 8 to + 7 LSBs of DAC)
Subaddress 0F
D7
DACONST
D5 … D0 ANCON
Changing from ‘0’ to ‘1’ starts automatic adjustment of
OUT1 … 3 output current.
Digital input value for DAC at output pin ANACON
(2’s complement code, all bits ‘0’ = medium output voltage)
Subaddress 10
D7
BCKFR
D6 … D5 BCKY
D4 … D3 BCKU
D2 … D1 BCKV
D0
BCKON
0: color of full screen background insertion according to the
settings of BCKY, BCKU, and BCKV
1: color of full screen background insertion identical with the
frame color
00: luminance value of full screen background: 20 IRE
01: luminance value of full screen background: 30 IRE
10: luminance value of full screen background: 40 IRE
11: luminance value of full screen background: 50 IRE
2 MSBs of chrominance component (B-Y) of full screen
background (remaining bits = ‘0’)
2 MSBs of chrominance component (R-Y) of full screen
background (remaining bits = ‘0’)
0: full screen background insertion OFF
1: full screen background insertion ON
Semiconductor Group
38
03.96