SDA9189X Datasheet, PDF (24/55 Pages) Siemens Semiconductor Group – Quarter PIP Processor

SDA 9189X
2.4.4 Framing
In this part of the circuit a colored frame is added to the inset picture. 4096 frame colors
are programmable, 4 bits for each component Y, (B-Y), (R-Y). The horizontal and vertical
widths of the frame are independently programmable. In the multi-PIP modes the various
partial pictures are separated by inner frame elements. These parts of the frame have a
fixed horizontal width of 4 pixels and a fixed vertical width of 2 lines. For INFR = ‘0’ the
inner frame elements are not inserted.
The outer frame elements border on the inset picture without limiting its size whereas the
inner frame elements reduce the areas of the partial pictures.
Examples for the Adjustment of Frame Colors
Frame Color
Blue
Green
White
Red
Yellow
Cyan
Magenta
FRY
D3 … D0 of
Subaddress 09
0100
0100
1100
0100
1100
1100
0100
FRU
D3 … D0 of
Subaddress 0A
0110
1000
0000
1000
1000
0010
0110
FRV
D7 … D4 of
Subaddress 0A
1010
1010
0000
0111
0100
1010
0100
2.4.5 Full Screen Background Insertion
Instead of showing the parent picture it is possible to fill the background (full screen
picture without inset picture and its frame, BCKON = ‘1’) with a programmable color.
For BCKFR = ‘1’ the background color is identical with the frame color, otherwise it is
defined by 6 bits programmable via I²C Bus: two bits for each component. The bits for
the chrominance signals are used directly as MSBs of the output words B-Y and R-Y.
The remaining LSBs are set to ‘0’. Therefore 16 different colors are possible. The two
bits for the Y-signal choose a luminance value according to the following table (100 IRE
corresponds to the full scale range of DAC input = integer value 63):
Background Luminance IRE
00
20
01
30
10
40
11
50
Integer Value
12
19
25
31
Semiconductor Group
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03.96