SDA9189X Datasheet, PDF (37/55 Pages) Siemens Semiconductor Group – Quarter PIP Processor

SDA 9189X
Detailed Description (cont’d)
Bit
Name
Function
Subaddress 0B
D7
INFR
D6 … D5 SELMOD
D4 … D3 FRWIDV
D2 … D0 FRWIDH
0: inner frame elements OFF
1: inner frame elements ON
00: TTL output
01: open source output
10: open drain output
Vertical width of PIP frame (0 … 3 lines)
Horizontal width of PIP frame (0 … 7 pixels)
Subaddress 0C
D3
MAT1
D2
MAT0
D1
CHRPIP
D0
OUTFOR
0: NTSC RGB matrix (USA)
1: NTSC RBG matrix (Japan)
0: EBU RGB matrix
1: NTSC RGB matrix
0: non-inverted chrominance output signals + (B-Y), + (R-Y)
1: inverted chrominance output signals – (B-Y), – (R-Y)
0: format of output signals: Y, (B-Y), (R-Y)
1: format of output signals: R G B
Subaddress 0D
D6 … D5 PLLTC
00: PLL loop filter: medium damping, low res. frequency
01: PLL loop filter: low damping, high res. frequency
10: PLL loop filter: high damping, low res. frequency
11: PLL loop filter: medium damping, high res. frequency
Note: After power on PLLTC must remain at 00 until system
is locked.
Semiconductor Group
37
03.96