SDA9189X Datasheet, PDF (43/55 Pages) Siemens Semiconductor Group – Quarter PIP Processor

SDA 9189X
3.2 Operational Range(cont’d)
Parameter
Symbol
Limit Values
Unit Remark
min. typ. max.
Digital Data TTL Inputs: YIN, UVIN¹⁾
Signal setup time
15
Signal hold time
5
ns LH transition of LL3I
ns LH transition of LL3I
Parent Horizontal Sync TTL Inputs: HSP¹⁾
Sync frequency in
single-frequency
display mode
14.53
15
Sync frequency in
double frequency
display mode
29.06
30
Signal rise time
Signal high time
100
Signal low time
900
16.72 kHz
17.19 kHz
33.44 kHz
34.38 kHz
100 ns
ns
ns
Quartz frequency
20.48 MHz
Quartz frequency
21.09 MHz
Quartz frequency
20.48 MHz
Quartz frequency
21.09 MHz
Noisefree transition
Parent Vertical Sync TTL Input VSP¹⁾
Signal high time
200
ns
Signal low time
200
ns
Quartz/Ceramic Resonator
Recommended
frequency
20.25 20.48 21.3
Series resistance
10
20
30
40
1) _{All values are referred to the corresponding min (VIH) and max (VIL).}
MHz 21.09 MHz for
MUSE
Ω C₁, C₂ ≤ 33 pF
Ω C₁, C₂ ≤ 22 pF
Ω C₁, C₂ ≤ 15 pF
Ω C₁, C₂ ≤ 10 pF
Semiconductor Group
43
03.96