SAB80C515A-5 Datasheet, PDF (64/108 Pages) Siemens Semiconductor Group – 8-Bit CMOS Single-Chip Microcontroller Family

SAB 80C515A/83C515A-5
Functional Description
The SAB 80C515A is based on 8051 architecture. It is a fully compatible member of the
Siemens SAB 8051/80C51 microcontroller family being an significantly enhanced
SAB 80C515. The SAB 80C515A is therefore code compatible with the SAB 80C515.
Having an 8-bit CPU with extensive facilities for bit-handling and binary BCD arithmetics the
SAB 80C515A is optimized for control applications. With a 18 MHz crystal, 58 % of the
instructions are executed in 666.67 ns.
While maintaining all architectural and operational characteristics of the SAB 80C515 the SAB
80C515A incorporates more on-chip RAM. A new 10-bit A/D-Converter is implemented as well
as an oscillator watchdog unit. Also the maximum operating frequency of 18 MHz is higher than
at the SAB 80C515.
With exception of the ROM sizes both parts are identical. Therefore the therm SAB 80C515A
refers to both versions within this specification unless otherwise noted.
Memory Organisation
According to the SAB 8051 architecture, the SAB 80C515A has separate address spaces for
program and data memory. Figure 2 illustrates the mapping of address spaces.
Figure 2
Memory Map
Semiconductor Group
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