SAB80C515A-5 Datasheet, PDF (47/108 Pages) Siemens Semiconductor Group – 8-Bit CMOS Single-Chip Microcontroller Family

On-Chip Peripheral Components
Starting the Watchdog Timer
There are two ways to start the Watchdog Timer depending on the level applied to the pin PE/SWD
(Power Down Modes enable # / Start Watchdog Timer; pin 4). This pin serves two functions (new
for the SAB 80C515A), because it is also used for disabling the software initiated power saving
modes. For details concerning software initiated power saving modes see User’s Manual
SAB 80C515.
Automatic Start of the Watchdog Timer
The automatic start of the Watchdog Timer directly after an external reset or a Hardware Power
Down (HWPD; PLCC68 pin 60, new for SAB 80C515A) is a hardware start initialized by strapping
pin 4 (PE/SWD) to V_CC. In this case the power saving modes (Software power-down mode and idle
mode) are disabled and cannot be started by software. If pin PE/SWD is left unconnected, a weak
pull-up transistor ensures the automatic start of the Watchdog Timer.
The self-start of the Watchdog Timer by a pin option has been implemented to provide high system
security in electrically noisy environments.
Note:
The automatic start of the Watchdog Timer is only performed if PE/SWD is held at high level while
RESET or HWPD is active. A positive transition at these pins during normal program execution will
not start the Watchdog Timer.
Furthermore, when using the hardware start, the Watchdog Timer starts running with its default
time-out period. The value in the reload register WDTREL, however can be overwritten at any time
to set any time-out period desired.
Software Start of the Watchdog Timer
The Watchdog Timer can also be started by software. This method is compatible to the start
procedure in the SAB 80C515. Setting of bit SWDT in SFR IEN1 starts the Watchdog Timer. Using
the software start, the time-out period can be programmed before Watchdog Timer starts running.
Note that once started the Watchdog Timer cannot be stopped by anything but an external
hardware reset at pin 10 (RESET) with a low level on pin 4 (PE/SWD) or a hardware power down
at pin 60 (HWPD, independently of level at PE/SWD).
Semiconductor Group
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